In the semiconductor integrated circuit (IC) industry, technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing.
Photolithography is a common process used for the fabrication of integrated circuits. Generally, photolithography involves exposing a photoresist layer to a light source through a patterned mask. The photoresist is then developed to remove various portions of the photoresist material such that the pattern in the mask is formed within the photoresist. Then, various fabrication processes such as etching can be applied. Due to the small feature size, various techniques are used to improve the photolithography process. In one example, a tri-layer resist is used. A tri-layer resist includes a first layer such as a Bottom Anti-Reflective Coating (BARC) layer, a second layer such as a silicon hard mask, and a third layer such as the photoresist. It is desirable to improve photolithographic techniques including those that involve a tri-layer resist.